ELEC3607: Embedded Systems (2015 - Semester 1)

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Unit: ELEC3607: Embedded Systems (6 CP)
Mode: Normal-Day
On Offer: Yes
Level: Senior
Faculty/School: School of Electrical & Information Engineering
Unit Coordinator/s: Prof Leong, Philip
Session options: Semester 1
Versions for this Unit:
Site(s) for this Unit: http://www.eelab.usyd.edu.au/ELEC3607/index.html
Campus: Camperdown/Darlington
Pre-Requisites: ELEC1601 AND ELEC2602.
Brief Handbook Description: Embedded systems have become pervasive in modern society. The aim of this unit of study is to teach students about embedded systems architecture, design methodology, interfacing and programming. Topics covered include peripheral devices, interrupts, direct memory access (DMA), assembly language, communications and data acquisition. A major design project is part of this course.
Assumed Knowledge: ELEC1601 AND ELEC2602. Logic operations, theorems and Boolean algebra, data representation, number operations (binary, hex, integers and floating point), combinational logic analysis and synthesis, sequential logic, registers, counters, bus systems, state machines, simple CAD tools for logic design, basic computer organisation, the CPU, peripheral devices, software organisation, machine language, assembly language, operating systems, data communications and computer networks.
Timetable: ELEC3607 Timetable
Time Commitment:
# Activity Name Hours per Week Sessions per Week Weeks per Semester
1 Lecture 2.00 1 13
2 Laboratory 3.00 1 10
3 Independent Study 8.00 1 13
T&L Activities: Laboratory: Laboratory exercises to re-enforce theory.

Independent Study: Prelab exercises and reading of text.

Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.

Attribute Development Method Attribute Developed
Laboratory exercises consist of design and problem solving. Design (Level 3)
Expertise specific to microcomputers and digital systems. Engineering/IT Specialisation (Level 3)
Development of fundamentals of microcomputers and projects. Maths/Science Methods and Tools (Level 3)
Skill in accessing and handling information on microcomputers. Information Seeking (Level 2)
Working in groups to solve design problems, report writing. Communication (Level 3)
Development of professional practice in design projects. Professional Conduct (Level 1)
Working in teams on design projects. Project and Team Skills (Level 2)

For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table.

Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.

Design (Level 3)
1. Ability to solve problems by undertaking investigation and solution formulation and then using a clearly defined approach for specific microcomputer problems.
Engineering/IT Specialisation (Level 3)
2. Demonstrable understanding of the tenets and concepts of the microcomputer.
3. Capacity to apply microcomputer concepts, principles and techniques to various engineering specific applications, to the extent of the material presented throughout the course.
4. Ability to demonstrate an understanding of microprocessor data sheets by identifying their structure and format and gauging the context of their data.
Maths/Science Methods and Tools (Level 3)
5. Ability to demonstrate an understanding of the concepts in digital systems fundamentals.
Communication (Level 3)
6. Ability to maintain professional records and documentation of the work performed by keeping a laboratory log book with specific information on problem solving activities.
Project and Team Skills (Level 2)
7. Ability to work in a team by participating and engaging constructively with other team members, drawing on their specific knowledge and abilities, and encouraging group dynamics and harmony in solving specific engineering problems.
Assessment Methods:
# Name Group Weight Due Week Outcomes
1 Prelab work and in-lab demonstrations No 10.00 Multiple Weeks 1, 3, 6, 7,
2 Assignment Yes 20.00 Multiple Weeks 1, 2, 3, 4, 5, 6, 7,
3 Final Exam No 70.00 Exam Period 2, 3, 4, 5,
Assessment Description: Final Exam: 2 hour exam.

Log Book: Log book kept on each laboratory exercise.

Assignment: Complete the design and implementation of an embedded system of the students` choosing.
Grading:
Grade Type Description
Standards Based Assessment Final grades in this unit are awarded at levels of HD for High Distinction, DI (previously D) for Distinction, CR for Credit, PS (previously P) for Pass and FA (previously F) for Fail as defined by University of Sydney Assessment Policy. Details of the Assessment Policy are available on the Policies website at http://sydney.edu.au/policies . Standards for grades in individual assessment tasks and the summative method for obtaining a final mark in the unit will be set out in a marking guide supplied by the unit coordinator.
Policies & Procedures: See the policies page of the faculty website at http://sydney.edu.au/engineering/student-policies/ for information regarding university policies and local provisions and procedures within the Faculty of Engineering and Information Technologies.
Recommended Reference/s: Note: References are provided for guidance purposes only. Students are advised to consult these books in the university library. Purchase is not required.
Online Course Content: http://www.eelab.usyd.edu.au/ELEC3607/index.html

Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp

Week Description
Week 1 Introduction.
Independent study.
Week 2 Independent study.
Peripheral Input/Output
Laboratory exercise 1: General Purpose I/O.
Week 3 Laboratory exercise 2: Switch Debouncing and General Purpose I/O.
Timer counter.
Independent study.
Week 4 Laboratory exercise 3: Counter/Timer.
Serial I/O.
Independent study.
Week 5 Laboratory exercise 4: UART and Interrupts.
Analog to digital converters and DMA
Independent study.
Week 6 Laboratory exercise 5: Power Supplies.
Finite state machines
Independent study.
Week 7 Independent study.
Assignment 1.
Oscillators
Week 8 Programming and debugging
Assignment 2.
Independent study.
Week 9 Independent study.
Driving loads
Assignment 3.
Week 10 Assignment 4.
Case study
Independent study.
Week 11 Assignment 5.
Assembly language
Independent study.
Week 12 Assembly language
Assignment 6.
Independent study.
Week 13 Review.
Operating Systems
STUVAC (Week 14) Independent study.
Exam Period Final exam.
Assessment Due: Final Exam

Course Relations

The following is a list of courses which have added this Unit to their structure.

Course Year(s) Offered
Computer Engineering 2010
Computer Engineering / Commerce 2010
Electrical (Bioelectronics) 2011, 2012
Electrical Engineering (Bioelectronics) / Arts 2011, 2012
Electrical Engineering (Bioelectronics) / Commerce 2011, 2012
Electrical Engineering (Bioelectronics) / Medical Science 2011, 2012
Electrical Engineering (Bioelectronics) / Science 2011, 2012
Electrical Engineering (Bioelectronics) / Law 2011, 2012
Electrical (Computer) 2011, 2012, 2013, 2014, 2015
Electrical Engineering (Computer) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Commerce 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Medical Science 2011, 2013, 2014
Electrical Engineering (Computer) / Science 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Law 2011, 2012, 2013, 2014
Electrical (Computer) / Arts 2015
Electrical (Computer) / Commerce 2015
Electrical (Computer) / Medical Science 2015
Electrical (Computer) / Project Management 2015
Electrical (Computer) / Science 2015
Electrical (Computer) / Law 2015
Bachelor of Computer Science and Technology (Computer Science) 2009, 2010, 2011, 2012
Bachelor of Computer Science and Technology (Information Systems) 2010, 2011, 2012
Biomedical - Electrical Major 2013, 2014
Electrical 2010, 2011, 2012, 2013, 2014, 2015
Electrical Engineering / Arts 2011, 2012, 2013, 2014
Electrical Engineering / Commerce 2010, 2011, 2012, 2013, 2014
Electrical Engineering / Medical Science 2011, 2012, 2013, 2014
Electrical Engineering / Project Management 2012, 2013, 2014
Electrical Engineering / Science 2011, 2012, 2013, 2014
Electrical (Power) 2011, 2012, 2013, 2014, 2015
Electrical Engineering (Power) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Power) / Project Management 2012, 2013, 2014
Electrical Engineering (Power) / Science 2011, 2012, 2013, 2014
Electrical (Telecommunications) 2011, 2012, 2013, 2014, 2015
Electrical Engineering (Telecommunications) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Commerce 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Medical Science 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Science 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Law 2011, 2012, 2013, 2014
Biomedical - Electrical Major 2015
Electrical / Arts 2015
Electrical / Commerce 2015
Electrical / Medical Science 2015
Electrical / Project Management 2015
Electrical / Science 2015
Electrical / Law 2015
Electrical (Telecommunications) / Arts 2015
Electrical (Telecommunications) / Commerce 2015
Electrical (Telecommunications) / Medical Science 2015
Electrical (Telecommunications) / Project Management 2015
Electrical (Telecommunications) / Science 2015
Electrical (Telecommunications) / Law 2015
Software 2015, 2010, 2011, 2012, 2013, 2014
Software Engineering / Arts 2011, 2012, 2013, 2014
Software Engineering / Commerce 2010, 2011, 2012, 2013, 2014
Software Engineering / Medical Science 2011, 2012, 2013, 2014
Software Engineering / Project Management 2012, 2013, 2014
Software Engineering / Science 2011, 2012, 2013, 2014
Telecommunications 2010
Bachelor of Information Technology (Computer Science) 2009, 2010, 2011, 2012
Information Technology (Computer Science)/Arts 2012
Bachelor of Information Technology (Information Systems) 2010, 2011, 2012
Information Technology (Information Systems)/Arts 2012
Information Technology (Computer Science) / Science 2012
Information Technology (Information Systems) / Science 2012

Course Goals

This unit contributes to the achievement of the following course goals:

Attribute Practiced Assessed
Design (Level 3) Yes 5.5%
Engineering/IT Specialisation (Level 3) Yes 62%
Maths/Science Methods and Tools (Level 3) Yes 21.5%
Information Seeking (Level 2) Yes 0%
Communication (Level 3) Yes 4.5%
Professional Conduct (Level 1) Yes 0%
Project and Team Skills (Level 2) Yes 6.5%

These goals are selected from Engineering & IT Graduate Outcomes Table which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.