ELEC5720: Foundations Electronic Devs & Basic Crts (2013 - Semester 2)
|Unit:||ELEC5720: Foundations of Electronic Devices and Circuits (6 CP)|
|Faculty/School:||School of Electrical and Information Engineering|
Dr Jin, Craig
|Session options:||Semester 2|
|Versions for this Unit:|
|Site(s) for this Unit:||
|Brief Handbook Description:||Modern Electronics has come to be known as microelectronics which refers to the Integrated Circuits (ICs) containing millions of discrete devices. This course introduces some of the basic electronic devices like diodes and different types of transistors. It also aims to introduce students the analysis and design techniques of circuits involving these discrete devices as well as the integrated circuits.
Completion of this course is essential to specialize in Electrical, Telecommunication or Computer Engineering stream. The knowledge of ELEC1103 is assumed.
|Assumed Knowledge:||Ohm`s Law and Kirchoff`s Laws; action of Current and Voltage sources; network analysis and the superposition theorem; Thevenin and Norton equivalent circuits; inductors and capacitors, transient response of RL, RC and RLC circuits; the ability to use power supplies, oscilloscopes, function generators, meters, etc.|
|T&L Activities:||Tutorial: Tutorial assistance provided
Independent Study: Reading assignment
Laboratory: Laboratory experiments
Laboratory: Prelab work
Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.
|Attribute Development Method||Attribute Developed|
|Design problems with given specifications as well as with assumed parameters.||Design (Level 3)|
|Basic electronics concepts and principles, grounded in circuit theory.||Engineering/IT Specialisation (Level 3)|
|Ability to apply circuit theory to modeling of engineering systems and processes.||Maths/Science Methods and Tools (Level 3)|
|Lab procedure and conducting experiments under controlled conditions.||Information Seeking (Level 3)|
|Ability to explain technical concepts.||Communication (Level 3)|
|Group work in labs.||Project Management and Team Skills (Level 2)|
For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table.
Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.Engineering/IT Specialisation (Level 3)
Lab Skills: Four lab exercises.
Mid-Sem Exam: Exam conducted in lecture time
Final Exam: Final exam
|Policies & Procedures:||See the policies page of the faculty website at http://sydney.edu.au/engineering/student-policies/ for information regarding university policies and local provisions and procedures within the Faculty of Engineering and Information Technologies.|
Note: Students are expected to have a personal copy of all books listed.
Note: References are provided for guidance purposes only. Students are advised to consult these books in the university library. Purchase is not required.
|Online Course Content:||http://www.eelab.usyd.edu.au/ELEC2104/index.htm|
Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp
|Week 1||Amplification:Voltage ,Current and Power gains;|
|The Op-Amp terminals:|
|Classification of Amplifiers|
|Circuit models;Frequency response:Amplifier bandwidth,|
|Nonlinear characteristics and Biasing;Symbol Convention;|
|Amplifier Power Supplies;|
|Week 2||Inverting configuration, Non-inverting configuration, Examples of Op-Amp circuits, Bistble multivibrator.|
|Week 3||Analysis of diode circuits.|
|Balanced three-phase circuits -Phase sequence -The ideal diode, Terminal characteristics of junction diode,|
|Week 4||The small signal model and its operation, Zener diode regulator, Rectifier circuits.|
|Week 5||Physical structure and mode of operation, Operation of npn transistor in the active mode, Circuit symbol and conventions, Transistor characteristics, Transistor circuits at DC.|
|Week 6||Transistor as an amplifier,|
|BJT - Continued:|
|Small signal equivalent models,|
|Graphical analysis, BJT Circuit design.|
|Week 7||BJT amplifier configurations, Transistor as a switch, Transistor current source.|
|BJT - Continued:|
|Structure and operation of MOSFET, i-v characteristic of enhancement MOSFET, The depletion type MOSFET.|
|Week 9||MOSFET circuits at DC, MOSFET as an amplifier.|
|Assessment Due: Mid-Sem Exam|
|Week 10||Structure and operation of JFET|
|Week 11||The BJT differential pair,|
|Small signal operation of BJT differential amplifier.|
|Week 12||Small signal operation of BJT differential amplifier|
|Assessment Due: Project|
|Week 13||(Self Study) Examples, Problems|
|STUVAC (Week 14)||.|
|Exam Period||Assessment Due: Final Exam|
The following is a list of courses which have added this Unit to their structure.
This unit contributes to the achievement of the following course goals:
|Design (Level 3)||Yes||0%|
|Engineering/IT Specialisation (Level 3)||Yes||75.68%|
|Maths/Science Methods and Tools (Level 3)||Yes||14.84%|
|Information Seeking (Level 3)||Yes||3.17%|
|Communication (Level 3)||Yes||3.17%|
|Professional Conduct (Level 2)||No||0%|
|Project Management and Team Skills (Level 2)||Yes||3.17%|
These goals are selected from Engineering & IT Graduate Outcomes Table which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.