ELEC5741: Foundations of Embedded Computing (2013 - Semester 1)

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Unit: ELEC5741: Foundations of Embedded Computing (6 CP)
Mode: Normal-Day
On Offer: Yes
Level: Postgraduate
Faculty/School: School of Electrical and Information Engineering
Unit Coordinator/s: A/Prof Leong, Philip
Session options: Semester 1
Versions for this Unit:
Site(s) for this Unit: http://www.eelab.usyd.edu.au/ELEC3607/index.html
Campus: Camperdown/Darlington
Pre-Requisites: None.
Brief Handbook Description: The aim of this unit of study is to teach students about microprocessors and their use. This includes architecture, programming and interfacing of microcomputers, peripheral devices and chips, data acquisition, device monitoring and control and communications.
Assumed Knowledge: ELEC1601 AND ELEC2602. Logic operations, theorems and Boolean algebra, data representation, number operations (binary, hex, integers and floating point), combinational logic analysis and synthesis, sequential logic, registers, counters, bus systems, state machines, simple CAD tools for logic design, basic computer organisation, the CPU, peripheral devices, software organisation, machine language, assembly language, operating systems, data communications and computer networks.
Timetable: ELEC5741 Timetable
Time Commitment:
# Activity Name Hours per Week Sessions per Week Weeks per Semester
1 Lecture 1.00 1 13
2 Laboratory 3.00 1 10
3 Independent Study 8.00 1 13
T&L Activities: Laboratory: Laboratory exercises to re-enforce theory.

Independent Study: Reading of text.

Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.

Attribute Development Method Attribute Developed
Laboratory exercises consist of design and problem solving. Design (Level 4)
Expertise specific to microcomputers and digital systems. Engineering/IT Specialisation (Level 4)
Development of fundamentals of microcomputers and projects. Maths/Science Methods and Tools (Level 4)
Skill in accessing and handling information on microcomputers. Information Seeking (Level 4)
Working in groups to solve design problems. Communication (Level 3)
Working in teams on design projects. Professional Conduct (Level 1)
Development of professional practice in design projects. Project Management and Teamwork (Level 2)

For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table.

Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.

Design (Level 4)
1. Ability to solve problems by undertaking investigation and solution formulation and then using a clearly defined approach for specific microcomputer problems.
Engineering/IT Specialisation (Level 4)
2. Demonstrable understanding of the tenets and concepts of the microcomputer.
3. Capacity to apply microcomputer concepts, principles and techniques to various engineering specific applications, to the extent of the material presented throughout the course.
4. Ability to demonstrate an understanding of microprocessor data sheets by identifying their structure and format and gauging the context of their data.
Maths/Science Methods and Tools (Level 4)
5. Ability to demonstrate an understanding of the concepts in digital systems fundamentals.
Communication (Level 3)
6. Ability to maintain professional records and documentation of the work performed by keeping a laboratory log book with specific information on problem solving activities.
Project Management and Teamwork (Level 2)
7. Ability to work in a team by participating and engaging constructively with other team members, drawing on their specific knowledge and abilities, and encouraging group dynamics and harmony in solving specific engineering problems.
Assessment Methods:
# Name Group Weight Due Week Outcomes
1 Log Book Yes 10.00 Multiple Weeks 1, 3, 6, 7,
2 Assignment Yes 20.00 Week 13 1, 2, 3, 4, 5, 6, 7,
3 Final Exam No 70.00 Exam Period 2, 3, 4, 5,
Assessment Description: Final Exam: 2 hour, multiple-choice exam.

Log Book: Log book kept on each laboratory exercise.

Assignment: Complete the design and implementation of an embedded system of the students` choosing.
Grading:
Grade Type Description
Standards Based Assessment Final grades in this unit are awarded at levels of HD (High Distinction), D (Distinction), CR (Credit), P (Pass) and F (Fail) as defined by Academic Board Resolutions: Assessment and Examination of Coursework. Details of Academic Board Resolutions are available on the University`s Policy website at http://www.usyd.edu.au/ab/policies/Assess_Exam_Coursework.pdf Standards for grades in individual assessment tasks and the summative method for obtaining a final mark in the unit will be set out in a marking guide supplied by the unit coordinator.
Faculty Policies & Procedures: Academic Honesty in Coursework. All students must submit a cover sheet for all assessment work that declares that the work is original and not plagiarised from the work of others.

Coursework assessment and examination policy. The faculty policy is to use standards based assessment for units where grades are returned and criteria based assessment for Pass/Fail only units. Norm referenced assessment will only be used in exceptional circumstances and its use will need to be justified to the Undergraduate Studies Committee. Special consideration for illness or misadventure may be considered when an assessment component is severely affected. This policy gives the details of the information that is required to be submitted along with the appropriate procedures and forms.

Special Arrangements for Examination and Assessment. In exceptional circumstances alternate arrangements for exams or assessment can be made. However concessions for outside work arrangements, holidays and travel, sporting and entertainment events will not normally be given.

Student Appeals against Academic Decisions. Students have the right to appeal any academic decision made by a school or the faculty. The appeal must follow the appropriate procedure so that a fair hearing is obtained.

Note that policies regarding assessment submission, penalties and assessment feedback depend upon the individual unit of study. Details of these policies, where applicable, will be found above with other assessment details in this unit outline.

All university policies can be found at http://sydney.edu.au/policy

Various request forms for the Faculty of Engineering and IT can be found at http://sydney.edu.au/engineering/forms/

Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp

Week Description
Week 1 Introduction.
Independent study.
Week 2 Assembly language I.
Laboratory exercise 1.
Independent study.
Week 3 Assembly language II.
Independent study.
Laboratory exercise 2.
Week 4 General purpose I/O.
Laboratory exercise 3.
Independent study.
Week 5 Timers and counters.
Laboratory exercise 4.
Independent study.
Week 6 Interrupts.
Laboratory exercise 5.
Independent study.
Week 7 Serial interfaces.
Assignment 1.
Independent study.
Week 8 Bus interfaces.
Assignment 2.
Independent study.
Week 9 Debugging.
Assignment 3.
Independent study.
Week 10 Operating systems.
Assignment 4.
Independent study.
Week 11 Real-time issues.
Assignment 5.
Independent study.
Week 12 Multiprocessor systems.
Assignment 6.
Independent study.
Week 13 Review.
Independent study.
Assessment Due: Assignment
STUVAC (Week 14) Independent study.
Exam Period Final exam.
Assessment Due: Final Exam

Course Relations

The following is a list of courses which have added this Unit to their structure.

Course Year(s) Offered
Graduate Certificate in Engineering 2011
Graduate Diploma in Engineering 2011
Master of Professional Engineering (Electrical) 2010, 2011, 2012, 2013

Course Goals

This unit contributes to the achievement of the following course goals:

Attribute Practiced Assessed
Design (Level 4) Yes 5.5%
Engineering/IT Specialisation (Level 4) Yes 62%
Maths/Science Methods and Tools (Level 4) Yes 21.5%
Information Seeking (Level 4) Yes 0%
Communication (Level 3) Yes 4.5%
Professional Conduct (Level 1) Yes 0%
Project Management and Teamwork (Level 2) Yes 6.5%

These goals are selected from Engineering & IT Graduate Outcomes Table which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.