Note: This unit version is currently under review and is subject to change!

ELEC2104: Electronic Devices and Circuits (2019 - Semester 2)

Download UoS Outline

Unit: ELEC2104: Electronic Devices and Circuits (6 CP)
Mode: Normal-Day
On Offer: Yes
Level: Intermediate
Faculty/School: School of Electrical & Information Engineering
Unit Coordinator/s: Kavehei, Omid
Session options: Semester 2
Versions for this Unit:
Site(s) for this Unit: https://canvas.sydney.edu.au/courses/9632
Campus: Camperdown/Darlington
Pre-Requisites: None.
Brief Handbook Description: Modern Electronics has come to be known as microelectronics, which refers to the Integrated Circuits (ICs). Integrated Circuits and Microelectronics have transformed our lives from the 1950s. The exponential pace of improvements in speed, performance, efficiency, and size enabled amazing technologies from personal computers to communication systems to advanced medical devices. They are usually divided into two general classes of analog and digital circuits. Microelectronic has been playing transformational roles in enabling:

- the next generation of quantum technologies (via, for example, current sensing and superconducting quantum interfacing),

- all hierarchy of electronic memory (DRAM, cache, SSD),

- internet of things, IoT (via for instance sensors, low-power on-chip signal processing),

- future communications (via ultra-high-speed technologies such as 5G),

- future computing systems (via on-chip artificial intelligence, specially designed graphics processing units (GPUs), and neuromorphic electronics),

- medical devices (via for example low-power amplifiers, better hardware-level artifact removal, interfacing with highly sensitive bio-sensors),

- high-precision sensing,

and many more.

Knowledge of microelectronic design is one of those unique skills that open doors into several opportunities in a wide range of topics as well as the world of deep-tech innovations and intellectual properties.

The magic behind microelectronic is a relatively simple semiconductor device called PN-junction diode. PN-junctions enabled revolutionary technologies such as transistors and photovoltaic (solar cells). Transistors are small switches with literally billions of them in every smartphone and personal computer. They are also tiny (analog) signal amplifiers and provide outstanding characteristics so that we can extract small signals buried under a considerable amount of noise.

This course introduces primary electronic devices like diodes and two broad types of transistors. It also aims to introduce students the analysis and design techniques of circuits involving these discrete devices as well as the integrated circuits. Completion of this course is essential to specialize in Electrical, Biomedical Circuits & Systems, Telecommunication Circuits & Systems, or Computer Engineering stream.

We answer or remind you of the answers to the following questions in this course:

- What is amplification, and what characteristics are classified as useful amplification?

- What is an operational amplifier?

- What strategies do we have to design amplifiers?

- What types of transistors do we have? How they differ in their digital and analog operations?

- How does a bipolar transistor work and how it is related to the basic functionality of a PN-junction diode?

- How does a field-effect transistor work and in what characteristics it is different from its bipolar cousin?

- What is and how do we analyze small-scale circuits?

- What are and why there are frequency-dependent properties?

- What are the main characteristics/specifications of an amplifier, and how do we measure and calculate them?

- When and why do we need to take into account high-frequency considerations?

Please note you must make sure you have sufficient prior knowledge in circuit theory (as listed for unit ELEC1103/ELEC9703). ELEC2104/ELEC9704 could be a very challenging unit if you do not have enough prior-knowledge.

For students information and planning purposes, it is essential to note this course is immediately relevant to and complementary for the following courses. The scale of relevance is from highly relevant (****) to related (*). The range is measured based on the current topic taught according to CUSP profile of the course.

ELEC1103: Fundamentals of Electrical and Electronic Engineering ****

ELEC1601: Introduction to Computer Systems *

BMET1960: Biomedical Engineering 1A ***

ELEC2302: Signals and Systems **

ELEC2602: Digital Logic ****

ELEC3305: Digital Signal Processing *

ELEC3404: Electronic Circuit Design ****

ELEC3802: Fundamentals of Biomedical Engineering ***

ELEC3803: Bioelectronics ****

BMET3921: Biomedical Design and Technology *

ELEC5516: Electrical and Optical Sensor Design **

ELEC5803: Advanced Bioelectronics ***

.
Assumed Knowledge: ELEC1103. Ohm`s Law and Kirchoff`s Laws; action of Current and Voltage sources; network analysis and the superposition theorem; Thevenin and Norton equivalent circuits; inductors and capacitors, transient response of RL, RC and RLC circuits; the ability to use power supplies, oscilloscopes, function generators, meters, etc.
Lecturer/s: Kavehei, Omid
Tutor/s: Please check information slides in Lecture 1 as names will not be cleared (by the School) until the semester starts.

>>> IMPORTANT NOTICE >>> Students are encouraged to communicate early any issues they may face with our tutors/demonstrators way of teaching/engaging, such as being difficult to understand, going through questions with a very slow/fast pace, or any other problems that are affecting student engagement and/or student learning. You can email the Unit Coordinator / Lecturer to provide your feedback or communicate with the Unit Coordinator / Lecturer via your program coordinator. In both cases, your identity remains strictly confidential. The School shortlists our tutors, and the Unit Coordinator has limited knowledge of their performance. While most of our previous tutors have been high performing and dedicated with excellent communication skills, in other few cases, a simple and ***early*** feedback did change the dynamics. Please provide early feedback, so we have a chance to improve where possible.
Timetable: ELEC2104 Timetable
Time Commitment:
# Activity Name Hours per Week Sessions per Week Weeks per Semester
1 Lecture 2.00 2 13
2 Laboratory 3.00 1 12
3 Tutorial 2.00 1 12
4 Independent Study 3.00
T&L Activities: > Lecture: Requires previous preparation activities and active participation. Questions will be asked during lectures, and students are expected to participate actively. These questions are mostly referring to fundamentals and prerequisite materials, and they carry no positive or negative mark. Short quizzes may be conducted during a lecture. For preparation activities, students are expected to study materials based on the shared topics under the `Schedule` tab, which includes necessary prior knowledge.

> Tutorial: Solve exercises extending the activities in the lecture and requires preparation activities and active participation. For preparation activities, students are expected to study materials provided to them before each tutorial. While full solutions for all tutorials are available on Canvas, students are expected to study given problems and be able to answer relevant questions during their tutorial session. Three tutorial sessions dedicate part of their time to In-tutorial Tests.

> Laboratory: Hands-on lab work. Students will be working in groups of two. They are expected to study lab material provided to them before attending their lab. Three lab sessions are dedicated to In-lab Test I, II, and III. Lab 0 is an introductory lab to remind students how to work with the board and equipment. It is essential that student make sure to regain fluency in working with our lab equipment within the first two lab sessions.

> Independent Study: Self-study/Preparation for lectures, tutorial, and labs.

>>> IMPORTANT NOTICE >>> Laboratories and Tutorials in this course are running at least one week behind Lectures given that Lectures are timetabled in such a way (2x 1hr, on Mon and Wed) that some students have a tutorial / a lab *before* a lecture in any given week. It is important that the necessary topics are discussed in lectures before their labs/tutorials sessions; therefore, to fix the timetabling issue, we have to run labs and tutorials sufficiently behind lectures. We are also running dedicated sessions for in-lab tests (see Assessments); therefore, the labs may fall further behind lectures than tutorials.

.

Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.

(6) Communication and Inquiry/ Research (Level 2)
1. Use information literacy tools in the design of electronic systems for assessment works.
2. Communicate with a group partner and/or tutors to design, analyse, and test a given experiment, and/or an assessment task.
(7) Project and Team Skills (Level 2)
3. Engage in team-based assessment activity, drawing on the knowledge, skills and creative talent of all members to deliver a solution to a particular electronic circuit problem.
(8) Professional Effectiveness and Ethical Conduct (Level 2)
4. An appreciation of the professional practice, standards, and responsibilities in working with hardware and software to the limit afforded by lab exercises.
(4) Design (Level 2)
5. Scope, build and test an electronic circuit.
6. Design electronic circuits with given parameters and/or specifications.
7. Apply concept, principles and techniques to configure and design circuits for specific application.
8. Proficiency in applying circuit theory and electronic circuit design knowledge in the design, construction, and testing of commensurate circuit solutions for specific engineering problems.
(2) Engineering/ IT Specialisation (Level 3)
9. Design and analyse circuits with operational amplifiers.
10. Analyse electronic circuits under small and large signal conditions with direct current (DC) or alternating current (AC) excitation.
11. Analyse electronic circuits and performing basic parameter extraction in analytically, by simulation or in practice.
12. Analyse and design amplifier circuits using bipolar or field effect transistors using different configuration.
13. Use lab equipment to conduct experiments involving electronic devices and circuits.
(1) Maths/ Science Methods and Tools (Level 2)
14. Analyze and design basic amplifier circuits using active components using a different configuration.
15. Demonstrate an understanding of the concepts and principles of electronic circuits, basics of analog and digital circuits with bipolar and field effect transistors.
16. Demonstrate an understanding of the concepts, principles, and relationship for circuits, applications, and relevant specifications.
17. Demonstrate fundamental knowledge of electronic circuits design issues.
Assessment Methods:
# Name Group Weight Due Week Outcomes
1 In-lab Test I Yes 5.00 Week 5 2, 3, 4, 5, 6, 7, 11, 13,
2 In-tutorial Test I No 5.00 Week 6 1, 5, 6, 7, 8, 9, 10, 11, 12, 14, 15, 16, 17,
3 In-lab Test II Yes 5.00 Week 8 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 17,
4 In-tutorial Test II No 10.00 Week 8 1, 5, 6, 7, 8, 9, 10, 11, 12, 14, 15, 16, 17,
5 In-tutorial Test III No 10.00 Week 11 1, 6, 7, 8, 9, 10, 11, 12, 14, 15, 16, 17,
6 In-lab Test III Yes 10.00 Week 12 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
7 Final Exam No 55.00 Exam Period 1, 5, 6, 7, 8, 9, 10, 11, 12, 14, 15, 16, 17,
Assessment Description: ATTENDANCE

All students are encouraged to read the Faculty of Engineering Resolution available at https://sydney.edu.au/handbooks/engineering/general/faculty_resolutions.shtml

According to the Resolution under ``Part 3: Studying and Assessment,``

(1) Students are required to be in attendance at the correct time and place of any formal or informal examinations. Non-attendance on any grounds insufficient to claim Special Consideration will result in the forfeiture of marks associated with the assessment. Participation in a minimum number of assessment items may be a requirement of any unit of study.

(2) Students are expected to attend a minimum of 90 percent of timetabled activities for a unit of study unless granted exemption by the Dean or Head of School most concerned. The Dean or Head of School most concerned may determine that a student fails a unit of study because of inadequate attendance. Alternatively, at their discretion, they may set additional assessment items where attendance is lower than 90 percent.

Note that matters such as clashes related to timetabling are outside the coordinator`s control. If informed, the teaching staff work with you to minimise the impact of the timetabling on your performance. These students note that options available to teaching staff are minimal when it comes to timetabling. Students are expected to attend their enrolled tutorial and laboratory sessions, and this is a must during In-Lab and In-Tutorial Tests unless a written (e.g. email) is given to the student.

---------------------------------------------------------------------

THE COURSE ASSESSMENT

- Maximum achievable mark in this unit is 100 unless in-lecture points for quizzes is achieved.

-- There are 25 Tutorial Tests, 20 Lab Tests, and 55 Final Exam points.

-- Individual assessments form 80 points, including 55 points for the Final Exam.

-- Group assessments form 20 points.

-- There may be a lecture quiz in any given week (Weeks 2 to 12). Any point achieved will be added to your total course mark.

- The final exam is open-book.

- In-Lab Tests are open-book.

- In-Tutorial Tests are closed-book.

- Usual restrictions on electronic devices and advanced calculators is applied to ALL assessment items in this course.

Topics for each assessment item is course material discussed until one week before the Test`s week.

- Time and venue for Tests are your enrolled lab or tutorial sessions. Time and venue for Test may change. Any change will be announced via Canvas announcement page. Students must check their university emails regularly.

- It is the student`s responsibility to make sure s/he presents/deliver his/her In-lab Test or In-tutorial Test outcomes/results. Regardless of the way each assessment is conducted, each will have a paper-sheet that students must write their name and sign as an indication of their Test submission.

- Each assessment will be out of 100 points unless otherwise stated.

- There may or may not be in-Lecture quizzes, and if there are, points will be extra to the total 100 achievable points (for the whole course). These bonus quizzes (if any) will not be available outside lecture time.

- To pass this unit, a student must

-- achieve an overall course mark of 50% or more,

-- achieve at least 40% in the written final examination (Final Exam).

Students who do not meet the above requirement will be given a maximum final course mark of no more than 45 regardless of their average. If their average is less than 45, then it remains as their final course mark.

- Lab Groups are consisted of two students. Lecturer/Coordinator may initially form groups or reform them later. Group members are not guaranteed to remain identical for all group assessments. Your sitting pattern in your Lab does not reflect your group membership. If required, a group may have three members, but approval should be given before forming such a group.

- In group assessments, tutors and lecturer will direct questions to any of the group members, and we may include specific roles and hence particular questions for any of the members.

- Primary simulation tool we may use in this course is LTSpice. Students can use any SPICE variation, including Multisim and its online tools such as Live Multisim. We may need to ask to use some specific components and device models.

- The primary analytical tool we may use in this course is Matlab.

- In-lab Tests are conducted during your timetabled Lab session. You must attend your timetabled Lab session for Lab Tests; otherwise, you may be asked to leave the Lab.

- Lab logbook keeping is highly encouraged but does not carry points.

- In-tutorial Tests will be conducted during your timetabled Tutorial session unless otherwise is announced.

- Unless otherwise is announced, In-lab Tests I & II & III cover any mix of theory (analytical) and experiment.

- In-tutorial Tests are a pure theory and analytical Test.

- Tutors may ask related questions to confirm the integrity of the assessment process, and they may point those questions to all or a random subset of groups or students.

- If an assessment requires simulation of a circuit, it is the student responsibility to make sure the simulation/analysis/design environment is ready and available for tutors and/or lecturer assessment.

- Unless otherwise is announced, marking for any practical/simulation tasks during In-Lab Tests will be based on four bands of fixed marks for an attempt coefficient.

-- 0 = nothing done,

-- 25% = attempted but mostly dysfunctional and no expectation is met,

-- 50% = parts are functional but major expectations are not met,

-- 75% = reasonably functional with minor issues, and

-- 100% = fully functional with all expectations are met).

- Theoretical and analytical questions included in In-Lab Tests or In-Tutorial Tests will be marked according to the steps involved in solving a given question and will be at the discretion of the coordinator, the lecturer, tutors or lab demonstrators.

- No student will be able to re-sit for a Test or have an alternative arrangement without an approved Special Consideration or Academic Plan with a clear statement on an agreed plan or alternative arrangement.

-- Links to the official university channels for Special Circumstances and Academic Plans are available on the home page of the course on Canvas.

---------------------------------------------------------------------

DISCIPLINE

A member of the teaching staff may suspend any student from attendance at their classes for misconduct or a breach of good order in Lectures, Tutorials, or Labs.

---------------------------------------------------------------------

CHEATING

All assessments and all work done in the laboratories must be your own (or your group`s). This does not preclude discussion in certain situations if allowed, but it is essential that the level of understanding of each individual student can be established. The University policy on Academic Honesty and plagiarism may be found here > https://sydney.edu.au/students/academic-dishonesty.html

---------------------------------------------------------------------
Assessment Feedback: Assessment feedback may be provided using one or a combination of methods such as face to face, in-lab, in-tutorial, via Canvas or email.
Grading:
Grade Type Description
Standards Based Assessment Final grades in this unit are awarded at levels of HD for High Distinction, DI (previously D) for Distinction, CR for Credit, PS (previously P) for Pass and FA (previously F) for Fail as defined by University of Sydney Assessment Policy. Details of the Assessment Policy are available on the Policies website at http://sydney.edu.au/policies . Standards for grades in individual assessment tasks and the summative method for obtaining a final mark in the unit will be set out in a marking guide supplied by the unit coordinator.
Policies & Procedures: See the policies page of the faculty website at http://sydney.edu.au/engineering/student-policies/ for information regarding university policies and local provisions and procedures within the Faculty of Engineering and Information Technologies.
Prescribed Text/s: Note: Students are expected to have a personal copy of all books listed.
Recommended Reference/s: Note: References are provided for guidance purposes only. Students are advised to consult these books in the university library. Purchase is not required.
Online Course Content: https://canvas.sydney.edu.au/courses/9632
Note on Resources: - "Analog Integrated Circuit Design" by Tony Chan Carusone, David Johns, Kenneth Martin is a great book for circuit design with field effect transistors.

- "The Art of Electronics" by Paul Horowitz and Winfield Hill is a great fundamental book perfect in describing complex topic with a simple language without many equations.

UniKey Login Required

Only current University of Sydney students may view this content.

If you are an existing student, please login with your UniKey here.

Course Relations

The following is a list of courses which have added this Unit to their structure.

Course Year(s) Offered
Biomedical Engineering / Law 2013, 2014
Biomedical Engineering / Arts 2013, 2014
Biomedical Engineering / Commerce 2013, 2014
Biomedical Engineering / Medical Science 2013, 2014
Biomedical Engineering / Project Management 2013, 2014
Biomedical Engineering / Science 2013, 2014
Biomedical - Chemical and Biomolecular Major 2013, 2014, 2015
Biomedical - Electrical Major 2013, 2014
Biomedical - Information Technology Major 2013, 2014, 2015
Biomedical - Mechanical Major 2013, 2014, 2015
Biomedical - Mechatronics Major 2013, 2014, 2015
Computer Engineering (till 2010) 2010
Computer Engineering / Commerce 2010
Electrical (till 2014) 2010, 2011, 2012, 2013, 2014
Electrical Engineering / Arts 2011, 2012, 2013, 2014
Electrical Engineering / Commerce 2010, 2011, 2012, 2013, 2014
Electrical (Bioelectronics) (till 2012) 2011, 2012
Electrical Engineering (Bioelectronics) / Arts 2011, 2012
Electrical Engineering (Bioelectronics) / Commerce 2011, 2012
Electrical Engineering (Bioelectronics) / Medical Science 2011, 2012
Electrical Engineering (Bioelectronics) / Science 2011, 2012
Electrical Engineering (Bioelectronics) / Law 2011, 2012
Electrical Engineering / Medical Science 2011, 2012, 2013, 2014
Electrical Engineering / Project Management 2012, 2013, 2014
Electrical Engineering / Science 2011, 2012, 2013, 2014
Electrical (Computer) (till 2014) 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Commerce 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Medical Science 2011, 2013, 2014
Electrical Engineering (Computer) / Science 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Law 2011, 2012, 2013, 2014
Electrical (Power) (till 2014) 2010, 2011, 2012, 2013, 2014
Electrical Engineering (Power) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Power) / Commerce 2010, 2011, 2012, 2013, 2014
Electrical Engineering (Power) / Medical Science 2011, 2012, 2013, 2014
Electrical Engineering (Power) / Project Management 2012, 2013, 2014
Electrical Engineering (Power) / Science 2011, 2012, 2013, 2014
Electrical Engineering (Power) / Law 2010, 2011, 2012, 2013, 2014
Electrical (Telecommunications) (till 2014) 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Commerce 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Medical Science 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Science 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Law 2011, 2012, 2013, 2014
Biomedical Mid-Year 2016, 2017, 2018, 2019, 2020
Biomedical/ Project Management 2019, 2020
Biomedical 2016, 2017, 2018, 2019, 2020
Biomedical / Arts 2015, 2016, 2017, 2018, 2019, 2020
Biomedical / Commerce 2015, 2016, 2017, 2018, 2019, 2020
Biomedical / Medical Science 2015, 2016, 2017
Biomedical / Music Studies 2016, 2017
Biomedical / Project Management 2015, 2016, 2017, 2018
Biomedical /Science 2015, 2016, 2017, 2018, 2019, 2020
Biomedical/Science (Health) 2018, 2019, 2020
Biomedical - Electrical Major 2015
Biomedical / Law 2015, 2016, 2017, 2018, 2019, 2020
Electrical Mid-Year 2016, 2017, 2018, 2019, 2020
Electrical/ Project Management 2019, 2020
Electrical 2015, 2016, 2017, 2018, 2019, 2020
Electrical / Arts 2015, 2016, 2017, 2018, 2019, 2020
Electrical / Commerce 2015, 2016, 2017, 2018, 2019, 2020
Electrical / Medical Science 2015, 2016, 2017
Electrical / Music Studies 2016, 2017
Electrical / Project Management 2015, 2016, 2017, 2018, 2020
Electrical / Science 2015, 2016, 2017, 2018, 2019, 2020
Electrical/Science (Health) 2018, 2019, 2020
Electrical (Computer) 2015
Electrical (Computer) / Arts 2015
Electrical (Computer) / Commerce 2015
Electrical (Computer) / Medical Science 2015
Electrical (Computer) / Project Management 2015
Electrical (Computer) / Science 2015
Electrical (Computer) / Law 2015
Electrical / Law 2015, 2016, 2017, 2018, 2019, 2020
Electrical (Power) 2015
Electrical (Power) / Arts 2015
Electrical (Power) / Commerce 2015
Electrical (Power) / Medical Science 2015
Electrical (Power) / Project Management 2015
Electrical (Power) / Science 2015
Electrical (Power) / Law 2015
Electrical (Telecommunications) 2015
Electrical (Telecommunications) / Arts 2015
Electrical (Telecommunications) / Commerce 2015
Electrical (Telecommunications) / Medical Science 2015
Electrical (Telecommunications) / Project Management 2015
Electrical (Telecommunications) / Science 2015
Electrical (Telecommunications) / Law 2015
Mechatronic Mid-Year 2016, 2017, 2018, 2019, 2020
Mechatronic/ Project Management 2019, 2020
Mechatronic 2015, 2016, 2017, 2018, 2019, 2020
Mechatronic / Arts 2015, 2016, 2017, 2018, 2019, 2020
Mechatronic / Commerce 2015, 2016, 2017, 2018, 2019, 2020
Mechatronic / Medical Science 2015, 2016, 2017
Mechatronic / Music Studies 2016, 2017
Mechatronic / Project Management 2015, 2016, 2017, 2018
Mechatronic / Science 2015, 2016, 2017, 2018, 2019, 2020
Mechatronic/Science (Health) 2018, 2019, 2020
Mechatronic / Law 2015, 2016, 2017, 2018, 2019, 2020
Mechatronic (Space) 2015
Mechatronic (Space) / Arts 2015
Mechatronic (Space) / Commerce 2015
Mechatronic (Space) / Medical Science 2015
Mechatronic (Space) / Project Management 2015
Mechatronic (Space) / Science 2015
Mechatronic (Space) / Law 2015
Mechatronic (till 2014) 2010, 2011, 2012, 2013, 2014
Mechatronic Engineering / Arts 2011, 2012, 2013, 2014
Mechatronic Engineering / Commerce 2010, 2011, 2012, 2013, 2014
Mechatronic Engineering / Medical Science 2011, 2012, 2013, 2014
Mechatronic Engineering / Project Management 2012, 2013, 2014
Mechatronic Engineering / Science 2011, 2012, 2013, 2014
Mechatronic (Space) (till 2014) 2010, 2011, 2012, 2013, 2014
Mechatronic Engineering (Space) / Arts 2011, 2012, 2013, 2014
Mechatronic Engineering (Space) / Commerce 2010, 2011, 2012, 2013, 2014
Mechatronic Engineering (Space) / Medical Science 2011, 2012, 2013, 2014
Mechatronic Engineering (Space) / Project Management 2012, 2013, 2014
Mechatronic Engineering (Space) / Science 2011, 2012, 2013, 2014
Mechatronic Engineering (Space) / Law 2010, 2011, 2012, 2013, 2014
Software Engineering (till 2014) 2010, 2011, 2012, 2013, 2014
Telecommunications (till 2010) 2010
Biomedical/Science (Medical Science Stream) 2018, 2019, 2020
Electrical/Science (Medical Science Stream) 2018, 2019, 2020
Mechatronic/Science (Medical Science Stream) 2018, 2019, 2020
Software Mid-Year 2016, 2017, 2018, 2019, 2020
Software 2015, 2016, 2017, 2018, 2019, 2020
Software Engineering / Arts 2011, 2012, 2013, 2014
Software Engineering / Commerce 2010, 2011, 2012, 2013, 2014
Software Engineering / Medical Science 2011, 2012, 2013, 2014
Software Engineering / Project Management 2012, 2013, 2014
Software Engineering / Science 2011, 2012, 2013, 2014
Software Engineering / Law 2014
Bachelor of Information Technology (Computer Science) 2014 and earlier 2010, 2011, 2012
Information Technology (Computer Science)/Arts 2012
Information Technology (Computer Science) / Science 2012
Information Technology (Information Systems)/Arts 2012
Information Technology (Information Systems) / Science 2012, 2013, 2014

Course Goals

This unit contributes to the achievement of the following course goals:

Attribute Practiced Assessed
(6) Communication and Inquiry/ Research (Level 2) No 5.8%
(7) Project and Team Skills (Level 2) No 1.75%
(8) Professional Effectiveness and Ethical Conduct (Level 2) No 1.25%
(5) Interdisciplinary, Inclusiveness, Influence (Level 2) No 0%
(4) Design (Level 2) No 21.85%
(2) Engineering/ IT Specialisation (Level 3) No 22.9%
(3) Problem Solving and Inventiveness (Level 2) No 0%
(1) Maths/ Science Methods and Tools (Level 2) No 46.45%

These goals are selected from Engineering & IT Graduate Outcomes Table 2018 which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table 2018 for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.