Note: This unit version is currently under review and is subject to change!
ELEC3305: Digital Signal Processing (2016 - Semester 1)
|Unit:||ELEC3305: Digital Signal Processing (6 CP)|
|Faculty/School:||School of Electrical & Information Engineering|
Dr Shrivastava, Yash
|Session options:||Semester 1|
|Versions for this Unit:|
|Site(s) for this Unit:|
|Brief Handbook Description:||This unit aims to teach how signals are processed by computers. It describes the key concepts of digital signal processing, including details of various transforms and filter design. Students are expected to implement and test some of these ideas on a digital signal processor (DSP). Completion of the unit will facilitate progression to advanced study in the area and to work in the industrial use of DSP.
The following topics are covered. Review of analog and digital signals. Analog to digital and digital to analog conversion. Some useful digital signals. Difference equations and filtering. Impulse and step response of filters. Convolution representation of filters. The Z-transform. Transfer functions and stability. Discrete time Fourier transform (DTFT) and frequency response of filters. Finite impulse response (FIR) filter design: windowing method. Infinite impulse response (IIR) filter design: Butterworth filters, Chebyshev filters, Elliptic filters and impulse invariant design. Discrete Fourier Transform (DFT): windowing effects. Fast Fourier Transform (FFT): decimation in time algorithm. DSP hardware.
|Assumed Knowledge:||Specifically the following concepts are assumed knowledge for this unit: familiarity with basic Algebra, Differential and Integral Calculus, continuous linear time-invariant systems and their time and frequency domain representations, Fourier transform, sampling of continuous time signals.|
Dr Shrivastava, Yash
|T&L Activities:||Tutorial: Tutorials are devoted to practicing basic concepts covered in the lectures and understanding how more complex tasks can be handled by putting these basic concepts together. The focus is on active learning and the group work and discussion is encouraged. The students also get to present their solutions to the rest of the class.
Laboratory: Labs are devoted to hands on experience with real DSP systems. Students will design and implement digital filters on DSP boards and make measurements. They will also present their results in the format of lab reports.
Independent Study: Students need to do some preparation for tutorials and labs. they may also need to read the text and other references to fully master the basic concepts covered in the lectures.
Project Work - own time: Project will require you to design and test a DSP system in Matlab, write a report and demonstrate your work. It is optional and worth a bonus mark of 10% (however, if you end up with a total mark of over 100 for the unit then it will be rounded down to 100). It is expected that you would enjoy the challenge.
Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.
|Attribute Development Method||Attribute Developed|
|Extensive design and analysis work is done in tutorials, labs, and project.||Design (Level 3)|
|Gain an understanding of the basic concepts in digital signal processing. It builds on the previous knowledge gained in signals and systems.||Engineering/IT Specialisation (Level 3)|
|Gain an ability to apply the principles of digital signal processing to various applications including filter design and speech processing.||Maths/Science Methods and Tools (Level 3)|
|Students need to work in groups and present their solutions to the rest of the class during tutorials. They also need to write lab reports, a project report and do project demonstration.||Communication (Level 3)|
|Group work in labs and tutorials.||Project and Team Skills (Level 2)|
For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table.
Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.Design (Level 3)
Tutorials and Labs: There are eight tutorials scheduled through the semester. Tutorials will include analytical problem solving sessions on the material covered in the lectures and computer aided solution / illustration. These sessions will give you the opportunity to explore the concepts in detail and are very helpful in understanding the material covered in the lecture. Please see the unit of study web page for the details of tutorial assessment scheme. It stresses the importance of your preparation work and enhances your communication skills. Besides this incentive, in my experience I have found that there is a direct correlation between the tutorial participation and the exam performance of the students. The solutions for the tutorials and computer codes will be available from the unit of study web page after the session.
There are three labs scheduled through the semester. Laboratories are designed to introduce you to the DSP hardware. They will require you to do some design, make measurements and perform demonstrations. Each lab is worth 1%. You will enjoy doing them. You need to submit a brief written lab report (worth 3%) for at least one of three labs. The idea is to give you some experience in report writing. Your best lab report mark will be counted towards the final assessment.
Project: Project will require you to design and test a simple DSP system, write a report and do the demonstration of your work. It is optional and worth a bonus mark of 10% (however, if you end up with a total mark of over 100 for the unit then it will be rounded down to 100). It is expected that you would enjoy the challenge.
Midterm Exam: The midterm exam is scheduled to provide you an assessment halfway through the semester and more importantly to give you a practice run for the final exam. It will be of the same format as the final exam (but of shorter duration). Again the solutions will be available on the unit of study web page after the exam. Both the midterm exam and the final exam will be based on the lecture material and tutorials. Both exams will be closed book and closed notes. They will test your conceptual understanding of the material. Any complex formulae needed, will be provided on the question paper.
Final Exam: Final Exam.
|Assessment Feedback:||Marked lab reports with detailed comments and Mid-Sem Exam will be returned to the students. Instant feedback is provided to the students during tutorials.|
|Policies & Procedures:||See the policies page of the faculty website at http://sydney.edu.au/engineering/student-policies/ for information regarding university policies and local provisions and procedures within the Faculty of Engineering and Information Technologies.|
Note: Students are expected to have a personal copy of all books listed.
|Online Course Content:||Learning Management System (LMS) through MyUni|
Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp
|Week 1||Review of analog and digital signals and ideal filter shapes.|
|Week 2||Analog to digital and digital to analog conversion and related issues.|
|Week 3||Some useful digital signals.|
|Week 4||Difference equation representation of digital filters.|
|Week 5||Convolution representation of digital filters, and introduction to Z-transform.|
|Week 6||Z-transform, impulse and step response for typical first and second order filters, and combination of filters.|
|Week 7||Discrete time Fourier transform (DTFT) and frequency response of filters.|
|Week 8||Midterm exam.|
|Assessment Due: Midterm Exam|
|Week 9||Discrete Fourier series, and finite impulse response (FIR) filters.|
|Week 10||FIR filter design using windowing method.|
|Week 11||Infinite impulse response (IIR) filter design: Butterworth filters, Chebyshev filters, Elliptic filters and impulse invariant design.|
|Week 12||IIR filter design, and Discrete Fourier Transform (DFT).|
|Week 13||DFT windowing effects, and Fast Fourier Transform (FFT): decimation in time algorithm.|
|Exam Period||Assessment Due: Final Exam|
The following is a list of courses which have added this Unit to their structure.
This unit contributes to the achievement of the following course goals:
|Design (Level 3)||Yes||1.33%|
|Engineering/IT Specialisation (Level 3)||Yes||76.04%|
|Maths/Science Methods and Tools (Level 3)||Yes||19.01%|
|Communication (Level 3)||Yes||1.81%|
|Project and Team Skills (Level 2)||Yes||1.81%|
|Information Seeking (Level 2)||No||0%|
These goals are selected from Engineering & IT Graduate Outcomes Table which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.