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ELEC9404: Electronic Circuit Design (2020 - Semester 1)

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Unit: ELEC9404: Electronic Circuit Design (6 CP)
Mode: Normal-Day
On Offer: Yes
Level: Postgraduate
Faculty/School: School of Electrical & Information Engineering
Unit Coordinator/s: Dr Yeoh, Phee
Session options: Semester 1
Versions for this Unit:
Site(s) for this Unit:
Campus: Camperdown/Darlington
Pre-Requisites: None.
Prohibitions: ELEC5737.
Brief Handbook Description: This unit of study aims to teach students analysis and design techniques for electronic systems such as signal amplifiers, differential amplifiers and power amplifiers. A background in basic electronics and circuit theory is assumed. Completion of this unit will allow progression to advanced studies or to work in electronics and telecommunication engineering.

Topics covered are as follows. The BJT as an amplifier. Biasing in BJT amplifier circuits. Small signal operation and models. Single stage BJT amplifiers. BJT internal capacitances and high frequency models. The frequency response of the common-emitter amplifier. BJT current sources and current mirrors. Differential amplifiers. Output stages and power amplifiers: class A, class B and class AB.
Assumed Knowledge: A background in basic electronics and circuit theory is assumed.
Lecturer/s: Dr Yeoh, Phee
Tutor/s: Lab manager:

Dr. Rui Chu


Nhan Duy Truong

Yuezhu Lu


Arun Sebastian

Tennison Liu
Timetable: ELEC9404 Timetable
Time Commitment:
# Activity Name Hours per Week Sessions per Week Weeks per Semester
1 Lecture 2.00 1 13
2 Tutorial 2.00 1 12
3 Laboratory 3.00 1 7
4 Independent Study 2.00 2 13
T&L Activities: Tutorial: Informal small tutorial groups where students work on circuit problems. Students learn and practice how to analyze circuits and devices.

Laboratory: Laboratory sessions where students learn about electronics. Practical instruction of electronics is vital to understanding circuits and developing problem solving skills.

Independent Study: Several assignments based on circuit design and simulation to be completed outside laboratory and tutorial time.

Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.

Attribute Development Method Attribute Developed
Understanding of electronic components and their use in electronic circuits. (1) Maths/ Science Methods and Tools (Level 2)
Understand the benefits and trade-offs of different electronic circuits and components including the effects on general purpose circuit building blocks. (2) Engineering/ IT Specialisation (Level 3)
In addition to the understanding the text and lecture notes, students need to do additional information searches to obtain necessary supplementary material. (3) Problem Solving and Inventiveness (Level 2)
Extensive design and analysis work is done in tutorials and laboratory. (4) Design (Level 2)
Write up experimental laboratory reports and communicate outcomes to other class members. Participate in tutorial sessions. (6) Communication and Inquiry/ Research (Level 2)
Group work in labs and tutorial. (7) Project and Team Skills (Level 2)

For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table 2018.

Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.

(6) Communication and Inquiry/ Research (Level 2)
1. Ability to make written and oral presentations concisely and accurately, in the form of tutorial presentations, lab reports, and project report.
(7) Project and Team Skills (Level 2)
2. Ability to work in a team to discuss with and draw upon the diverse skills and knowledge of other team members in conducting lab experiments.
(4) Design (Level 2)
3. Ability to conduct experimental laboratory work using circuits and associated bench top equipment such as voltage supplies and oscilloscopes to solve a particular problem.
4. Ability to design power amplifiers and output stages, digital and integrated circuits using techniques and principles presented in the course.
(2) Engineering/ IT Specialisation (Level 3)
5. Ability to use basic circuit building blocks to create more advanced circuits within the scope and to the extent of the information presented.
6. Ability to demonstrate an understanding of operational amplifiers and their internal devices, including BJT and CMOS transistors, DC biasing techniques and small signal modelling.
7. Capacity to apply specific principles and techniques to SPICE circuit simulation using a variety of different software packages from leading industry vendors to the extent of the material presented.
8. Ability to determine the stability of feedback amplifiers and their steady state performance.
(3) Problem Solving and Inventiveness (Level 2)
9. Ability to instigate inquiry to extend the knowledge and awareness of supplementary techniques, concepts and materials using varied resources and media formats within the context of the projects and problems investigated.
(1) Maths/ Science Methods and Tools (Level 2)
10. Ability to demonstrate an understanding of fundamental issues in electronic circuit design such as non-idealities of amplifiers and the effect of passive and parasitic components.
Assessment Methods:
# Name Group Weight Due Week Outcomes
1 Exp 1 - Laboratory Introduction (Op-amp) Yes 5.00 Week 3 1, 2, 3,
2 Exp 2 - BJT amplifier Yes 5.00 Week 5 1, 2, 3, 6,
3 Exp 3 - Differential amplifiers & current mirror Yes 5.00 Week 7 1, 2, 3, 5, 6,
4 Project - Power Amplifier Yes 15.00 Week 13 1, 2, 3, 4, 6, 9,
5 Tutorial Yes 5.00 Multiple Weeks 1, 2, 4, 5, 6, 7, 8, 9, 10,
6 Quiz 1 No 5.00 Week 5 4, 5, 6, 10,
7 Quiz 2 Yes 5.00 Week 9 5, 6, 7,
8 Quiz 3 No 5.00 Week 12 5, 6, 7, 8,
9 Final Exam - must be passed to pass the course No 50.00 Exam Period 1, 4, 5, 6, 8, 10,
Assessment Description: Lab Skills: Lab work is performed in groups. Each student must use a bound notebook to record pre-lab work and lab experiments individually. These are assessed by lab staff in each tutorial session along with group participation and pre-lab work (done before the lab). The final project includes assessment for 1) your individual lab book recordings of design, calculations and simulations, circuit building, troubleshooting of the circuits, comments, solutions, and conclusions and 2) A group presentation.

Final Exam and quizzes: All subject matter in the course is examinable in this exam including laboratory, tutorial and assignment work.

Tutorial: Calculation and design exercises.

There may be statistically defensible moderation when combining the marks from each component to ensure consistency of marking between markers, and alignment of final grades with unit outcomes. You must get 50% in the final exam to pass the unit, regardless of the sum of your individual marks.

Penalties for lateness: Consistent penalty of 5% per day late, e.g., A “good” assignment that would normally get 9/10, and is 2 days late, loses 10% of the full 10 marks, i.e., new mark = 8/10. An average assignment, that would normally get 5/10, that is 5 days late, loses 25% of the full 10 marks, i.e., new mark = 2.5/10. Assignments more than 10 days late get 0. Pre-lab work should be submitted before the lab.
Assessment Feedback: Feedback on assessment tasks will be provided within 1 week of the due date, apart from the final exam. General feedback will also be given in lectures and individual feedback in tutorials and laboratories.
Grade Type Description
Standards Based Assessment Final grades in this unit are awarded at levels of HD for High Distinction, DI (previously D) for Distinction, CR for Credit, PS (previously P) for Pass and FA (previously F) for Fail as defined by University of Sydney Assessment Policy. Details of the Assessment Policy are available on the Policies website at . Standards for grades in individual assessment tasks and the summative method for obtaining a final mark in the unit will be set out in a marking guide supplied by the unit coordinator.
Policies & Procedures: See the policies page of the faculty website at for information regarding university policies and local provisions and procedures within the Faculty of Engineering and Information Technologies.
Prescribed Text/s: Note: Students are expected to have a personal copy of all books listed.
  • Microelectronic Circuits
Online Course Content: Canvas
Note on Resources: Analog Electronic Design, Jonathan Scott, Prentice Hall

The Art of Electronics, Thomas C. Hayes and Paul Horowitz, Cambridge University Press

Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar

Week Description
Week 1 OpAmpRevision and BJTs
Week 2 MOSFETS and BJTs
Week 3 BJT and MOSFET circuits
Assessment Due: Exp 1 - Laboratory Introduction (Op-amp)
Week 4 Integrated Circuits
Week 5 Differential Circuits
Assessment Due: Exp 2 - BJT amplifier
Assessment Due: Quiz 1
Week 6 Frequency Response
Week 7 Feedback
Assessment Due: Exp 3 - Differential amplifiers & current mirror
Week 8 Output Stages and Power Amplifiers
Week 9 Operational Amplifier Circuits
Assessment Due: Quiz 2
Week 10 CMOS Digital Amplifier Circuits
Week 11 Advanced MOS logic
Week 12 Memory Circuits
Assessment Due: Quiz 3
Week 13 Review
Assessment Due: Project - Power Amplifier
Exam Period Assessment Due: Final Exam - must be passed to pass the course

Course Relations

The following is a list of courses which have added this Unit to their structure.

Course Year(s) Offered
Master of Professional Engineering (Accelerated) (Electrical) 2019, 2020
Master of Professional Engineering (Electrical) 2015, 2016, 2017, 2018, 2019, 2020

Course Goals

This unit contributes to the achievement of the following course goals:

Attribute Practiced Assessed
(6) Communication and Inquiry/ Research (Level 2) Yes 15.34%
(7) Project and Team Skills (Level 2) Yes 8%
(8) Professional Effectiveness and Ethical Conduct (Level 2) No 0%
(5) Interdisciplinary, Inclusiveness, Influence (Level 2) No 0%
(4) Design (Level 2) Yes 20.84%
(2) Engineering/ IT Specialisation (Level 3) Yes 44.51%
(3) Problem Solving and Inventiveness (Level 2) Yes 2%
(1) Maths/ Science Methods and Tools (Level 2) Yes 9.34%

These goals are selected from Engineering & IT Graduate Outcomes Table 2018 which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table 2018 for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.