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ELEC5402: Digital Integrated Circuit Design (2011 - Semester 1)

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Unit: ELEC5402: Digital Integrated Circuit Design (6 CP)
Mode: Normal-Day
On Offer: Yes
Level: Postgraduate
Faculty/School: School of Electrical & Information Engineering
Unit Coordinator/s: Dr McEwan, Alistair
Session options: Semester 1
Versions for this Unit:
Site(s) for this Unit: http://www.eelab.usyd.edu.au/ELEC5402
Campus: Camperdown/Darlington
Pre-Requisites: None.
Brief Handbook Description: This unit of study explores CMOS technology and integrated circuit design and fabrication. The fundamental theory and techniques behind digital integrated circuit design are introduced. A primary focus of this unit is providing the student with practical laboratory design experience using a professional VLSI CAD tool to design digital integrated circuits. This unit provides a foundation for more advanced digital integrated circuit design techniques and also analogue integrated circuit design.

Topics covered in this unit are: IC manufacturing process and CMOS technology, CMOS static logic design, CMOS dynamic logic design, arithmetic building block design, sequential logic design, VLSI interconnection and wiring issues, timing issues, digital memory design, digital system design methodologies.
Assumed Knowledge: Electronic circuit design and physics of electronic devices.
Lecturer/s: Dr McEwan, Alistair
Timetable: ELEC5402 Timetable
Time Commitment:
# Activity Name Hours per Week Sessions per Week Weeks per Semester
1 Lecture 2.00 1 13
2 Project Work - in class 2.00 1 13
3 Independent Study 9.00 13
T&L Activities: Project Work - in class: Large project assignments in pairs or own work to develop digital integrated circuit designs. Students learn how to use leading IC design software from schematic entry to layout and extracted simulation.

Independent Study: Students are required to research and complete assignment work on their own or in small groups.

Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.

Attribute Development Method Attribute Developed
Develop and ability to design digital integrated circuits using advanced design tools and simulation. Design and Problem Solving Skills (Level 4)
Understand the foundations of modern CMOS digital IC design. Discipline Specific Expertise (Level 5)
An appreciation of the various forms of literature on circuits and systems including technical books and reports, research articles, customer requirements and industry standards. These attributes are acquired through the project work and laboratory/tutorials. Information Skills (Level 2)
Ability to explain and build on an understanding of the devices used in integrated circuits. Professional Communication (Level 2)
The costs associated with integrated circuits are demand a professional design approach and students study associated issues to ensure reliability and yield. Professional Values, Judgement and Conduct (Level 2)
Group interaction in the laboratory and lectures to tackle testing design challenges Teamwork and Project Management (Level 2)

For explanation of attributes and levels see Engineering/IT Graduate Attribute Matrix 2009.

Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.

Design and Problem Solving Skills (Level 4)
1. Ability to design a small, custom digital IC using an industry standard IC design tool.
Discipline Specific Expertise (Level 5)
2. Ability to demonstrate an understanding of the concepts used in modern CMOS digital IC design.
3. Ability to develop circuit schematics for logic circuits using area, power and speed variables and the principles and techniques developed throughout the course.
4. Ability to develop an efficient circuit layout for logic circuits from scratch and build these into a larger processor design.
5. Ability to analyse integrated circuit layouts using advanced circuit design tools including LVS, extracted layout simulation and standard cells.
Information Skills (Level 2)
6. Ability to identify information needs and undertake inquiry and knowledge development, drawing on varied sources and formats and then synthesising this information within the context of integrated circuit design.
Professional Communication (Level 2)
7. Ability to communicate in written and oral formats delivering information clearly, concisely and on topic using a range of communication tools such as presentations in tutorials and reports in laboratory and project work environments.
Professional Values, Judgement and Conduct (Level 2)
8. Capacity to demonstrate an understanding of economic and yield issues of integrated circuits in the microelectronics industry, to the extent of the material presented.
Teamwork and Project Management (Level 2)
9. Ability to work in a team by clearly sharing responsibilities, drawing on others' skills and knowledge through receptiveness to their opinions and using initiative to contribute constructively in designing of integrated circuits.
Assessment Methods:
# Name Group Weight Due Week Outcomes
1 Final Exam No 30.00 Exam Period 1, 2, 3, 4, 7, 8,
2 Lab 1: Cell Design and Verification Yes 17.50 Week 4 (Wednesday, 9 am) 1, 2, 4, 5, 6, 7, 9,
3 Lab 2: Datapath Design and Verification Yes 17.50 Week 7 (Wednesday, 9 am) 1, 2, 4, 5, 7, 8, 9,
4 Lab 3: Controller Design and Verification Yes 17.50 Week 10 (Wednesday, 9 am) 1, 2, 3, 5, 6, 7, 8, 9,
5 Lab 4: Full Chip Assembly Yes 17.50 Week 13 (Friday, 5 pm) 1, 2, 3, 4, 5, 6, 7, 8, 9,
Assessment Description: Assignment: Formal reports from the practical laboratory experience using the Mentor Graphics professional VLSI CAD tool to design digital integrated circuits. Assessment will include technical description and writing skills in individual reports and participation in group work.

Final Exam: The final exam covers all materials presented in the lectures and laboratory.
Assessment Feedback: Lab work will be assessed on a regular basis and feedback given in written and oral form in labs and lectures. Exam preparation including practice quizzes will occur in lectures.
Grading:
Grade Type Description
Standards Based Assessment Final grades in this unit are awarded at levels of HD for High Distinction, DI (previously D) for Distinction, CR for Credit, PS (previously P) for Pass and FA (previously F) for Fail as defined by University of Sydney Assessment Policy. Details of the Assessment Policy are available on the Policies website at http://sydney.edu.au/policies . Standards for grades in individual assessment tasks and the summative method for obtaining a final mark in the unit will be set out in a marking guide supplied by the unit coordinator.
Policies & Procedures: Policies regarding academic honesty and plagiarism, special consideration and appeals in the Faculty of Engineering and Information Technologies can be found on the Faculty's policy page at http://www.eng.usyd.edu.au/policies Faculty policies are governed by Academic Board resolutions whose details can be found on the Central Policy Online site at http://www.usyd.edu.au/policy/

Policies regarding assessment formatting, submission methods, late submission penalties and assessment feedback depend on the unit of study. Details of these policies, where applicable, should be found above with other assessment details.
Prescribed Text/s: Note: Students are expected to have a personal copy of all books listed.
Library e-Reserve: Please check the Library e-Reserve site for additional course resources.
Online Course Content: http://www.eelab.usyd.edu.au/ELEC5402 and my uni
Note on Resources: Digital Integrated Circuits, Jan Rabaey, A. Chandrakasan, B. Nikolic, Prentice Hall

CMOS Digital Integrated Circuits Analysis and design, Sung-Mo Kang, Yusuf Leblebici, 3rd Edition, McGraw Hill

Analog VLSI: Circuits and Principles, Shih-Chii Liu et al., The MIT Press

Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp

Week Description
Week 1 Introduction
Week 2 The MOSFET
Week 3 Cadence Demonstration
Week 4 Layout
Assessment Due: Lab 1: Cell Design and Verification
Week 5 Sub-micron Transistors
Week 6 Logic Gates
Week 7 CMOS Latches
Assessment Due: Lab 2: Datapath Design and Verification
Week 8 Compound Logic gates
Week 9 Dynamic Logic
Week 10 Adders
Assessment Due: Lab 3: Controller Design and Verification
Week 11 Project Work
Week 12 Interconnect
Week 13 Advanced Integrated Circuit Issues
Assessment Due: Lab 4: Full Chip Assembly
Exam Period Assessment Due: Final Exam

Course Relations

The following is a list of courses which have added this Unit to their structure.

Course Year(s) Offered
Computer Engineering (till 2010) 2010
Electrical (till 2014) 2010, 2011, 2012, 2013, 2014
Electrical Engineering / Arts 2011, 2012, 2013, 2014
Electrical Engineering / Commerce 2010, 2011, 2012, 2013, 2014
Electrical (Bioelectronics) (till 2012) 2011, 2012
Electrical Engineering (Bioelectronics) / Arts 2011, 2012
Electrical Engineering (Bioelectronics) / Science 2011, 2012
Electrical Engineering (Bioelectronics) / Law 2012
Electrical Engineering / Medical Science 2011, 2012, 2013, 2014
Electrical Engineering / Project Management 2012, 2013, 2014
Electrical Engineering / Science 2011, 2012, 2013, 2014
Electrical (Computer) (till 2014) 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Commerce 2012, 2013, 2014, 2011
Electrical Engineering (Computer) / Science 2011, 2012, 2013, 2014
Electrical Engineering (Computer) / Law 2012, 2013, 2014
Electrical (Power) (till 2014) 2010, 2011, 2012, 2013, 2014
Electrical Engineering (Power) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Power) / Project Management 2012, 2013, 2014
Electrical Engineering (Power) / Science 2011, 2012, 2013, 2014
Electrical (Telecommunications) (till 2014) 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Science 2011, 2012, 2013, 2014
Electrical Mid-Year 2016, 2017, 2018, 2019, 2020
Electrical/ Project Management 2019, 2020
Electrical 2015, 2016, 2017, 2018, 2019, 2020
Electrical / Arts 2016, 2017, 2018, 2019, 2020
Electrical / Commerce 2016, 2017, 2018, 2019, 2020
Electrical / Medical Science 2016, 2017
Electrical / Music Studies 2016, 2017
Electrical / Project Management 2016, 2017, 2018, 2020
Electrical / Science 2016, 2017, 2018, 2019, 2020
Electrical/Science (Health) 2018, 2019, 2020
Electrical (Computer) 2015
Electrical / Law 2016, 2017, 2018, 2019, 2020
Electrical (Power) 2015
Electrical (Telecommunications) 2015
Software Mid-Year 2016, 2017
Software 2015, 2016, 2017
Software / Arts 2016, 2017
Software / Commerce 2016, 2017, 2018, 2019, 2020
Software / Medical Science 2016, 2017
Software / Music Studies 2016, 2017
Software / Project Management 2016, 2017
Software / Science 2016, 2017, 2018, 2019, 2020
Software/Science (Health) 2018, 2019, 2020
Software / Law 2016, 2017, 2018, 2019, 2020
Software Engineering (till 2014) 2010, 2011, 2012, 2013, 2014
Software Engineering / Arts 2011, 2012, 2013, 2014
Software Engineering / Commerce 2010, 2011, 2012, 2013, 2014
Software Engineering / Medical Science 2011, 2012, 2013, 2014
Software Engineering / Project Management 2012, 2013, 2014
Software Engineering / Science 2011, 2012, 2013, 2014
Telecommunications (till 2010) 2010
Bachelor of Information Technology (Computer Science) 2014 and earlier 2010, 2011, 2012
Information Technology (Computer Science)/Arts 2012
Electrical/Science (Medical Science Stream) 2018, 2019, 2020
Master of Engineering 2013, 2014, 2015, 2016, 2017, 2018, 2019, 2020
Master of Engineering (Electrical) 2011, 2012
Master of Engineering (Network) 2012
Master of Engineering (Power) 2011, 2012
Master of Engineering (Wireless) 2012
Master of Professional Engineering (Electrical) 2010, 2011, 2012, 2013
Software/Science (Medical Science Stream) 2018, 2019, 2020
Computer Engineering / Commerce 2010
Electrical Engineering (Computer) / Medical Science 2011, 2013, 2014
Electrical Engineering (Telecommunications) / Arts 2011, 2012, 2013, 2014
Electrical Engineering (Telecommunications) / Medical Science 2011, 2012, 2013, 2014
Information Technology (Computer Science) / Science 2012

Course Goals

This unit contributes to the achievement of the following course goals:

Attribute Practiced Assessed
Design and Problem Solving Skills (Level 4) Yes 19%
Discipline Specific Expertise (Level 5) Yes 46.5%
Fundamentals of Science and Engineering (Level 3) No 0%
Information Skills (Level 2) Yes 5.25%
Professional Communication (Level 2) Yes 12%
Professional Values, Judgement and Conduct (Level 2) Yes 10.25%
Teamwork and Project Management (Level 2) Yes 7%

These goals are selected from Engineering/IT Graduate Attribute Matrix 2009 which defines overall goals for courses where this unit is primarily offered. See Engineering/IT Graduate Attribute Matrix 2009 for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.