Note: This unit is an archived version! See Overview tab for delivered versions.
ELEC5621: Digital Systems Design (2011 - Semester 2)
| Unit: | ELEC5621: Digital Systems Design (6 CP) |
| Mode: | Normal-Day |
| On Offer: | Yes |
| Level: | Postgraduate |
| Faculty/School: | School of Electrical & Computer Engineering |
| Unit Coordinator/s: |
Prof Leong, Philip
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| Session options: | Semester 2 |
| Versions for this Unit: |
| Campus: | Camperdown/Darlington |
| Pre-Requisites: | ELEC2602 AND ELEC3608. Basic knowledge of digital logic, computer architecture and microprocessor systems is required. |
| Brief Handbook Description: | This unit of study explores the design of digital computing systems using hardware description languages. Topics covered include field programmable gate array (FPGA) architectures, computer arithmetic, high-speed digital logic, interfacing, computer architectures and case studies. Emphasis will be on how to design high-performance digital systems at the algorithmic, system and logic level. Students are required to implement, test and report on a digital design of moderate complexity. |
| Assumed Knowledge: | None. |
| Timetable: | ELEC5621 Timetable | ||||||||||||||||||||
| Time Commitment: |
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| T&L Activities: | Laboratory: Laboratory experiments to revise concepts and gain familiarity with design tools. Assignment: Propose and design a digital system of moderate complexity. Independent Study: Self study |
Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.
| Attribute Development Method | Attribute Developed |
| Students will be required to address a significant digital design component. | Design and Problem Solving Skills (Level 5) |
| State of the art digital architectures and design techniques will be covered. | Discipline Specific Expertise (Level 4) |
| Students will learn to model various aspects of digital systems. | Fundamentals of Science and Engineering (Level 2) |
| Students will develop skills in accessing and digesting information on research topics in digital systems. | Information Skills (Level 3) |
| Communications with other team members and in the form of reports will be necessary. | Professional Communication (Level 3) |
| Students will be required to consider systems as a whole and exercise judgement to develop work programs and ensure work is completed on time. | Professional Values, Judgement and Conduct (Level 2) |
| Students will be required to work in teams, practise communications and leadership skills and manage their projects in an effective manner. | Teamwork and Project Management (Level 4) |
For explanation of attributes and levels see Engineering/IT Graduate Attribute Matrix 2009.
Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.
Design and Problem Solving Skills (Level 5)| Assessment Methods: |
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| Assessment Description: |
Lab Report: Lab exercises. Report due each week, one week after each lab day. Assignment: Design project. Final Exam: 2 hour closed book. |
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| Policies & Procedures: | Policies regarding academic honesty and plagiarism, special consideration and appeals in the Faculty of Engineering and Information Technologies can be found on the Faculty's policy page at http://www.eng.usyd.edu.au/policies Faculty policies are governed by Academic Board resolutions whose details can be found on the Central Policy Online site at http://www.usyd.edu.au/policy/ Policies regarding assessment formatting, submission methods, late submission penalties and assessment feedback depend on the unit of study. Details of these policies, where applicable, should be found above with other assessment details. |
| Recommended Reference/s: |
Note: References are provided for guidance purposes only. Students are advised to consult these books in the university library. Purchase is not required.
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| Note on Resources: | Scientific papers. |
Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp
| Week | Description |
| Week 1 | Lecture: Introduction |
| Week 2 | Lecture: FPGA architectures |
| Tutorial: FPGA architecture tutorial | |
| Week 3 | Lecture: FPGA interconnects |
| Tutorial: FPGA interconnect reading assignment | |
| Week 4 | Lecture: Finite state machines |
| Lab: Design exercise I | |
| Week 5 | Lecture: Hardware compilation |
| Design exercise II | |
| Week 6 | Lecture: Shift registers, LFSRs and random number generators |
| Lab: Define project | |
| Week 7 | Lecture: Cryptographic applications |
| Lab: Work on project I | |
| Week 8 | Lecture: Distributed arithmetic |
| Lab: Work on project II | |
| Week 9 | Lecture: Signal processing applications |
| Lab: Work on project III | |
| Week 10 | Lecture: Neuromorphic engineering |
| Work on project IV | |
| Week 11 | Lecture: Computer arithmetic |
| Lab: Work on project V | |
| Week 12 | Lecture: Floating point arithmetic |
| Assessment Due: Design project | |
| Week 13 | Lecture: High speed interfacing |
| Assessment Due: Assignment report | |
| Exam Period | Assessment Due: Final exam |
Course Relations
The following is a list of courses which have added this Unit to their structure.
Course Goals
This unit contributes to the achievement of the following course goals:
| Attribute | Practiced | Assessed |
| Design and Problem Solving Skills (Level 5) | Yes | 4% |
| Discipline Specific Expertise (Level 4) | Yes | 4% |
| Fundamentals of Science and Engineering (Level 2) | Yes | 4% |
| Information Skills (Level 3) | Yes | 5% |
| Professional Communication (Level 3) | Yes | 27% |
| Professional Values, Judgement and Conduct (Level 2) | Yes | 4% |
| Teamwork and Project Management (Level 4) | Yes | 2% |
These goals are selected from Engineering/IT Graduate Attribute Matrix 2009 which defines overall goals for courses where this unit is primarily offered. See Engineering/IT Graduate Attribute Matrix 2009 for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.
