Note: This unit is an archived version! See Overview tab for delivered versions.
MTRX3700: Mechatronics 3 (2013 - Semester 2)
Unit: | MTRX3700: Mechatronics 3 (6 CP) |
Mode: | Normal-Day |
On Offer: | Yes |
Level: | Senior |
Faculty/School: | School of Aerospace, Mechanical & Mechatronic Engineering |
Unit Coordinator/s: |
A/Prof Rye, David
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Session options: | Semester 2 |
Versions for this Unit: | |
Site(s) for this Unit: |
http://www.aeromech.usyd.edu.au/MTRX3700/Course_Material/ |
Campus: | Camperdown/Darlington |
Pre-Requisites: | MTRX2700. |
Prohibitions: | MECH4710. |
Brief Handbook Description: | This unit of study aims to provide experience, confidence and competence in the design and implementation of microprocessor-based products and instruments; to impart a detailed knowledge of the software and hardware architecture of a typical modern microcontroller, and an understanding of the use of these resources in product design; and to provide experience of working in a project team to prototype a realistic product to meet a specification. At the end of this unit students will understand microprocessor system organization, and the organization of multiple and distributed processor systems, special purpose architectures (DSPs etc.) and their application. The student will have a detailed knowledge of the software and hardware architecture of a modern microcontroller. This knowledge will include an in-depth understanding of the relationship between assembly language, high-level language, and the hardware, of the utilisation and interfacing of microcontroller hardware resources, and of the design and development of software comprised of multiple interrupt-driven processes. The student will have the competence to develop prototype microprocessor-based products. Course content will include single processor systems, multiple and distributed processing systems, special purpose architectures (DSPs etc) and their application; standard interfacing of sensor and actuation systems; ADC/DAC, SSI, parallel, CAN bus etc.; specific requirements for microprocessor-based products; problem definition and system design; tools for design, development and testing of prototype systems; the unit of study will include a project, where groups of students design, develop and commission a microprocessor-based product. |
Assumed Knowledge: | Completion of a first course in microprocessor systems, including assembly and C language programming, interfacing, introductory digital and analogue electronics. |
Lecturer/s: |
A/Prof Rye, David
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Tutor/s: | Adrian Ball and Daniel Wilson. | ||||||||||||||||||||
Timetable: | MTRX3700 Timetable | ||||||||||||||||||||
Time Commitment: |
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T&L Activities: | Independent Study: You are expected to undertake at least five hours of independent study per week outside of formally timetabled classes. The Mechatronics Laboratory is `open access` outside of formally-timetabled classes. |
Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.
Attribute Development Method | Attribute Developed |
Designing and implementing microcontroller software for specific tasks, together with systematic software and hardware debugging at the component level. Designing and implementing a significant microcontroller-based product that requires design and development of local and remote user interfaces, engineering algorithims, data communication methods, sensor management, product packaging and both engineering and user documentation. |
Design (Level 3) |
Developing a detailed knowledge of the software and hardware architecture of a typical modern microcontroller and confidence. Developing competence in applying this knowledge to design and realisation of microprocessor-based products and instruments. | Engineering/IT Specialisation (Level 4) |
Searching for, reading and understanding manufacturers` data sheets. | Information Seeking (Level 3) |
Development of an understanding of the product development process. | Professional Conduct (Level 2) |
Working in a group towards a shared goal. Developing an understanding of group dynamics. Project and resource management. | Project and Team Skills (Level 3) |
For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table.
Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.
Design (Level 3)Assessment Methods: |
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Assessment Description: |
Final Exam: The examination is open-book, to encourage deep learning rather than reliance on memory. Presentation/Seminar: An oral presentation is required early in the Major Project development cycle. The intent is to simulate a typical step in product development, where a team must rapidly be formed, a large amount of technical data assimilated and key decisions taken, responsibilities allocated and project planning commenced. Assignment: The first assignment is completed in groups of two persons. The small group environment ensures that all students gain a detailed core of knowledge that will support their work in the Major Project. Project: MTRX 3700 Mechatronics 3 is a project-based unit of study. There is strong emphasis placed on understanding the material so that a student can make things work in the lab. Most of the learning will therefore occur in the laboratory, and the assessment weighting of assignment and project work reflects this fact. |
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Grading: |
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Policies & Procedures: | See the policies page of the faculty website at http://sydney.edu.au/engineering/student-policies/ for information regarding university policies and local provisions and procedures within the Faculty of Engineering and Information Technologies. |
Prescribed Text/s: |
Note: Students are expected to have a personal copy of all books listed.
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Online Course Content: | http://www.aeromech.usyd.edu.au/MTRX3700/Course_Material/ |
Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp
Week | Description |
Week 1 | Introduction, Hardware Overview |
Week 2 | 8F452 Core Hardware and Instruction Set |
Week 3 | 18F452 Peripheral Hardware; Assembler |
Week 4 | Synchronous Serial I/O |
Week 5 | C Compiler, Relocation & Linking. Mixed C and Assembley Language |
Week 6 | Software Design |
Week 7 | Memory Hierarchy |
Assessment Due: Software Exercises | |
Week 8 | Processes and Threads |
Week 9 | Multiprocessor and Multicomputer System |
Assessment Due: Design Walkthrough | |
Week 10 | Hardware Issues: grounding, power supply, etc. |
Week 11 | RISC Processors & DSPs |
Week 12 | Communications |
Week 13 | Uncommitted |
Assessment Due: Major Project | |
Exam Period | Assessment Due: Final Exam |
Course Relations
The following is a list of courses which have added this Unit to their structure.
Course Goals
This unit contributes to the achievement of the following course goals:
Attribute | Practiced | Assessed |
Design (Level 3) | Yes | 40.61% |
Engineering/IT Specialisation (Level 4) | Yes | 36.79% |
Information Seeking (Level 3) | Yes | 11.6% |
Professional Conduct (Level 2) | Yes | 0% |
Project and Team Skills (Level 3) | Yes | 11% |
These goals are selected from Engineering & IT Graduate Outcomes Table which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.