Note: This unit is an archived version! See Overview tab for delivered versions.
ELEC2104: Electronic Devices and Circuits (2018 - Semester 2)
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| Unit: | ELEC2104: Electronic Devices and Circuits (6 CP) |
| Mode: | Normal-Day |
| On Offer: | Yes |
| Level: | Intermediate |
| Faculty/School: | School of Electrical & Computer Engineering |
| Unit Coordinator/s: |
Kavehei, Omid
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| Session options: | Semester 2 |
| Versions for this Unit: | |
| Site(s) for this Unit: |
https://canvas.sydney.edu.au/courses/9632 |
| Campus: | Camperdown/Darlington |
| Pre-Requisites: | None. |
| Brief Handbook Description: | Modern Electronics has come to be known as microelectronics which refers to the Integrated Circuits (ICs) containing millions of discrete devices. This course introduces some of the basic electronic devices like diodes and different types of transistors. It also aims to introduce students the analysis and design techniques of circuits involving these discrete devices as well as the integrated circuits. Completion of this course is essential to specialise in Electrical, Biomedical Circuits & Systems, Telecommunication Circuits & Systems, or Computer Engineering stream. Please note it is extremely important that you make sure you have sufficient prior knowledge in circuit theory (as listed for unit ELEC1103/ELEC9703). ELEC2104/ELEC9704 could be a very challenging unit if you do not have sufficient prior knowledge. |
| Assumed Knowledge: | ELEC1103. Ohm`s Law and Kirchoff`s Laws; action of Current and Voltage sources; network analysis and the superposition theorem; Thevenin and Norton equivalent circuits; inductors and capacitors, transient response of RL, RC and RLC circuits; the ability to use power supplies, oscilloscopes, function generators, meters, etc. |
| Lecturer/s: |
Kavehei, Omid
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| Timetable: | ELEC2104 Timetable | |||||||||||||||||||||||||
| Time Commitment: |
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| T&L Activities: | Lecture: Requires previous preparation activities and active participation. Questions will be asked during lectures and students are expected to participate actively. These questions are mostly referring to fundamentals and prerequisite materials, and they carry no positive or negative mark. Short quizzes may be conducted during a lecture. For preparation activities, students are expected to study materials based on the shared topics under the `Schedule` tab which includes necessary prior knowledge. Tutorial: Solve exercises extending the activities in the lecture. Requires preparation activities and active participation. For preparation activities, students are expected to study materials provided to them before each tutorial. While full solutions for all tutorials are available on Canva, students are expected to study given problems and be able to answer relevant questions during their tutorial session. One tutorial session will be partially dedicated to an In-tutorial Test. Laboratory: Hands-on lab work. Students will be working in groups of two. They are expected to study lab material provided to them before attending their lab. Three lab sessions are dedicated to In-lab Test I, II and III. Lab 0 is an introductory lab with the aim to remind students how to work with the board and equipment. It is essential that student make sure to regain fluency in working with our lab equipment within the first two lab sessions. Independent Study: Self-study/Preparation for lectures, tutorial, and labs. |
Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.
| Attribute Development Method | Attribute Developed |
| Design circuits with given specification and/or with assumed parameters. | Design (Level 2) |
| Basic electronics concepts and principles, grounded in circuit theory. | Engineering/IT Specialisation (Level 3) |
| Detailed study of circuit analysis and the ability to apply circuit theory to modelling of engineering systems and processes. | Maths/Science Methods and Tools (Level 2) |
| Lab procedure and conducting experiments under controlled conditions. | Information Seeking (Level 2) |
| Ability to explain technical concepts in verbally or in writing. | Communication (Level 2) |
| Maintaining a high level of professional conduct during laboratories for individual and group tasks and assessments. | Professional Conduct (Level 2) |
| Group work in labs and all group-work assessment. | Project and Team Skills (Level 2) |
For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table 2018.
Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.
Design (Level 2)
1. Ability to scope, build and test an electronic circuit.
2. Ability to design electronic circuits with given parameters and/or specifications.
3. Ability to apply concept, principles and techniques to configure and design circuits for specific application.
4. Proficiency in applying circuit theory and electronic circuit design knowledge in the design, construction, and testing of commensurate circuit solutions for specific engineering problems.
Engineering/IT Specialisation (Level 3)
5. Able to design and analyse circuits with operational amplifiers.
6. Able to analyse electronic circuits under small and large signal conditions with direct current (DC) or alternating current (AC) excitation.
7. Able to analyse electronic circuits and performing basic parameter extraction in analytically, by simulation or in practice.
8. Ability to analyse and design amplifier circuits using bipolar or field effect transistors using different configuration.
9. Ability to use lab equipment to conduct experiments involving electronic devices and circuits.
Maths/Science Methods and Tools (Level 2)
10. Ability to analyze and design basic amplifier circuits using active components using a different configuration.
11. Ability to demonstrate an understanding of the concepts and principles of electronic circuits, basics of analog and digital circuits with bipolar and field effect transistors.
12. Ability to demonstrate an understanding of the concepts, principles, and relationship for circuits, applications, and relevant specifications.
13. Ability to demonstrate fundamental knowledge of electronic circuits design issues.
Information Seeking (Level 2)
14. Able to use information literacy tools in the design of electronic systems for assessment works.
Communication (Level 2)
15. Ability to communicate with a group partner and/or tutors to design, analyse, and test a given experiment, and/or an assessment task.
Professional Conduct (Level 2)
16. An appreciation of the professional practice, standards, and responsibilities in working with hardware and software to the limit afforded by lab exercises.
Project and Team Skills (Level 2)
17. Ability to engage in team-based assessment activity, drawing on the knowledge, skills and creative talent of all members to deliver a solution to a particular electronic circuit problem.
| Assessment Methods: |
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| Assessment Description: |
- Maximum achievable mark in this unit is 100. -- Except the Final Exam mark, 24 points are distributed before the mid-semester break (Weeks 1 to 8) and 36 points after the mid-semester break (Weeks 9-13). -- Group assessments form 42 points. -- Individual assessments form 58 points. - IMPORTANT NOTEs before reading the rest of assessment details: Time and venue for Assignment assessment/submission and Test could change. Any change will be announced via Canvas. - It is the student`s responsibility to make sure s/he presents/deliver his/her Assignment or In-lab Test or In-tutorial Test outcomes/results. Regardless of the way each assessment item is conducted during the semester, each will have a paper-sheet that students must write their name and sign as an indication of their Assignment or Test submission. - Each assessment is out of -at least- 100 points. - There may or may not be assessment items with more than 100 points. - To pass this unit, a student must achieve an overall final mark of 50 points or more AND achieve at least 40 points in the written final examination (Final Exam). -- Any student not meeting these requirements may be given a maximum final (total) mark of no more than 45 regardless of their average. - Groups are consist of two students. Lecturer/Coordinator may initially form groups or reform them later. Group members are not guaranteed to remain identical for all group assessments. Your sitting pattern in your lab does not reflect your group membership. If required, a group may have three members. - In group assessments, tutors and lecturer may direct questions to any of the group members. - Main simulation tool we may use in this course is LTSpice. Students can use any SPICE variation including Multisim and/or its online tools such as Live Multisim. We may need aks to use some specific components and device models. - The main analytical tool we may use in this course is Matlab. - In-lab Tests are conducted during your timetabled Lab session. You must attend your timetabled Lab session for Lab Tests otherwise you may be asked to leave the Lab. - Lab logbook keeping is highly encouraged but does not carry points. - In-tutorial Test will be conducted during your timetabled Tutorial session unless otherwise is announced. - Unless otherwise is announced, In-lab Tests I, II & III are covering any mix of theory and experiment. - In-tutorial Test is a pure theory and analytical test. - Students will be given analytical analysis, design, implementation and/or simulation tasks for Assignments I, II, and III according to the following timeline: -- Assignment I task will be revealed at the beginning of your enrolled Lab session in Week 2 and is due by the end of your enrolled Lab session in Week 4 (unless otherwise is announced). -- Assignment II task will be revealed at the beginning of your enrolled Lab session in Week 6 and is due by the end of your enrolled Lab session in Week 9 (unless otherwise is announced). -- Assignment III task will be revealed at the beginning of your enrolled Tutorial session in Week 9 and is due by the end of your enrolled Tutorial session in Week 13 (unless otherwise is announced). --- Tutors may ask assignment related questions to confirm the integrity of the assessment process and they may point those questions to all or a random subset of groups or students. --- If an assignment requires simulation of a circuit, it is the student responsibility to make sure the simulation/analysis/design environment is ready and available for tutors and/or lecturer assessment. Assessments may include questions from any topic covered (according to the textbook and course schedule) until the week prior to their due dates. - Unless otherwise is announced, marking for any practical/simulation tasks (NOT analytical analysis) during In-Lab Tests or In-Tutorial Test will be based on four bands of fixed marks for an attempt coefficient. -- 0=nothing done, -- 25%=attempted but mostly dysfunctional and no expectation is met, -- 50%=parts are functional but major expectations are not met, -- 75%=reasonably functional with minor issues, and -- 100%=fully functional with all expectations are met). Note, as explained, this ONLY applies to parts that are practical or simulation assessments or if analytical tools are expected to be used. - No student will be able to re-sit for a Test or have an alternative arrangement without an approved Special Consideration or Academic Plan with a clear statement on an agreed plan or alternative arrangement. -- Links to the official university channels for special circumstances and academic plans are available on home page of the course on Canvas. |
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| Assessment Feedback: | Assessment feedback may be provided using one or a combination of methods such as face to face, in-lab, in-tutorial, via Canvas or email. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Grading: |
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| Policies & Procedures: | See the policies page of the faculty website at http://sydney.edu.au/engineering/student-policies/ for information regarding university policies and local provisions and procedures within the Faculty of Engineering and Information Technologies. |
| Prescribed Text/s: |
Note: Students are expected to have a personal copy of all books listed.
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| Recommended Reference/s: |
Note: References are provided for guidance purposes only. Students are advised to consult these books in the university library. Purchase is not required.
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| Online Course Content: | https://canvas.sydney.edu.au/courses/9632 |
| Note on Resources: |
- "Analog Integrated Circuit Design" by Tony Chan Carusone, David Johns, Kenneth Martin is a great book for circuit design with field effect transistors. - "The Art of Electronics" by Paul Horowitz and Winfield Hill is a great fundamental book perfect in describing complex topic with a simple language without many equations. |
Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp
| Week | Description |
| Week 1 | Lecture: Course organization, Overview and Basic Semiconductor Physics, pn-Junctions |
| Lab: no lab | |
| Tutorial: no tutorial | |
| Week 2 | Lecture: Basic Semiconductor Physics, pn-Junctions |
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Lab: Lab 0 - RC Circuits and Review of how to work with the Lab equipment Assumed knowledge: RC circuit design and analysis, Ability to use power supplies, oscilloscopes, function generators, meters, ELVIS board and general lab equipment used in ELEC1103 Assignment I will be announced. |
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| Tutorial: Tutorial 1 | |
| Week 3 |
Lecture: Operational Amplifiers (Op-Amp) Assumed knowledge: ELEC1103 discussions on Operational amplifiers, Op-Amp Configurations and Circuits, RC circuits and Impedance analysis. |
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Lab: Lab 1 - Part 1 - Op-Amp based Circuit Design, Electromyogram Circuit Example Assumed knowledge: Students should refer to basics of differential amplification with Op-Amps in ELEC1103 |
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| Tutorial: Tutorial 2 | |
| Week 4 |
Lecture: pn-Junctions Diodes, Diode Models and Circuits, Bipolar Junction Transistors (BJTs) Assumed knowledge: Basic circuit analysis, KVL, KCL, Thevenin and Norton equivalent circuits, and network analysis |
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Lab: Lab 1 - Part 2 - Op-Amp based Circuit Design, Electromyogram Circuit Example Assumed knowledge: Students should refer to basics of differential amplification with Op-Amps in ELEC1103 |
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| Tutorial: Tutorial 3 | |
| Assessment Due: Assignment I | |
| Week 5 | Lecture: Bipolar Junction Transistors (BJTs), BJT Amplifiers |
| Lab: In-lab Test I | |
| Tutorial: Tutorial 4 | |
| Assessment Due: In-lab Test I | |
| Week 6 | Lecture: BJT Amplifiers |
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Lab: Lab 2 - Diodes and Diode Circuits Assignment II will be announced. |
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| Tutorial: Tutorial 5 | |
| Week 7 | Lecture: BJT Amplifiers, Physics of Field-Effect Transistors |
| Lab: Lab 3 - Diode-based Rectifiers and RC circuits | |
| Tutorial: Tutorial 6 | |
| Week 8 | Lecture: Physics of Field-Effect Transistors, MOSFET circuits and CMOS amplifier |
| Lab: In-lab Test II | |
| Tutorial: Tutorial 7 | |
| Assessment Due: In-lab Test II | |
| Week 9 |
Lecture: MOSFET circuits and CMOS amplifier, Some references to the digital CMOS circuits. Note: 1st October is a public holiday. No lecture on that day! |
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Lab: Lab 4 - BJT Characterization and Circuits Assignment III will be announced. Note: 1st October is a public holiday. This does not affect labs. |
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Tutorial: Tutorial 8 Note: 1st October is a public holiday. No tutorial on that day! |
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| Assessment Due: Assignment II | |
| Week 10 | Lecture: BJT's and MOSFET's Cascode Stages and Current Mirrors |
| Lab: Lab 5 - MOSFET Characterization and Circuits | |
| Tutorial: Tutorial 9 | |
| Week 11 |
Lecture: Fundamentals of Differential Amplifier Circuit Design with BJT and MOSFET Assumed knowledge: Students should refer to basics of differential amplification with Op-Amps in ELEC1103 |
| Lab: Lab 6 - BJT Amplifier | |
| Tutorial: In-tutorial Test (maximum an hour) + an hour tutorial | |
| Assessment Due: In-tutorial Test | |
| Week 12 | Lecture: Basics of Frequency Response Analysis in BJT and MOSFET models and circuits |
| Lab: In-lab Test III | |
| Tutorial: Tutorial 10 | |
| Assessment Due: In-lab Test III | |
| Week 13 | (Self Study) Examples, Problems |
| Lab: Catch-up Test | |
| Tutorial: Tutorial 11 | |
| Assessment Due: Assignment III | |
| STUVAC (Week 14) | . |
| Exam Period | Assessment Due: Final Exam |
Course Relations
The following is a list of courses which have added this Unit to their structure.
Course Goals
This unit contributes to the achievement of the following course goals:
| Attribute | Practiced | Assessed |
| Design (Level 2) | Yes | 28.94% |
| Engineering/IT Specialisation (Level 3) | Yes | 25.4% |
| Maths/Science Methods and Tools (Level 2) | Yes | 23.2% |
| Information Seeking (Level 2) | Yes | 8.2% |
| Communication (Level 2) | Yes | 5.1% |
| Professional Conduct (Level 2) | Yes | 3.76% |
| Project and Team Skills (Level 2) | Yes | 5.4% |
These goals are selected from Engineering & IT Graduate Outcomes Table 2018 which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table 2018 for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.
